
# This file is used by the simulation model as well as the ispLEVER bitstream
# generation process to automatically initialize the PCS quad to the mode
# selected in the IPexpress. This file is expected to be modified by the
# end user to adjust the PCS quad to the final design requirements.
# channel_0 is in "PCI Express" mode
# channel_1 is in "PCI Express" mode
# channel_2 is in "PCI Express" mode
# channel_3 is in "PCI Express" mode

ch0 13 03  # Powerup Channel
ch0 00 01
quad 28 50  # Reference clock multiplier
quad 29 10  # FPGA sourced refclk
# quad 02 00  # ref_pclk source is ch0
quad 18 04  # PCI Express Mode
quad 14 7F  # Word Alignment Mask
quad 15 03  # +ve K
quad 16 7C  # -ve K
# quad 0D 97  # Watermark level on CTC
quad 0E 00  # insertion/deletion control of CTC
quad 12 1C  # pattern for CTC match
quad 13 01
ch0 15 10  # +6dB equalization
ch0 14 93  # pre
quad 41 00  # de-assert serdes_rst






