BITGEN: Bitstream Generator Radiant Software (64-bit) 2023.2.t.305.0 Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2023 Lattice Semiconductor Corporation, All rights reserved. Thu Mar 14 15:45:13 2024 Command: bitgen -w -gui -g REGISTER_INIT:ON Blink_RevB_impl_1.udb D:/Avant_Versa_RevB/Avant-X Versa Board revB_Blink/impl_1/Blink_RevB_impl_1 Running DRC. WARNING <71301018> - The PLL clock port [clk_in] is assigned to a non PLL dedicated pin [T7], which might affect the clock performance. Use dedicated PLL clock resources for the port. DRC detected 0 errors and 0 warnings. Preference Summary: +---------------------------------+---------------------------------+ | Preference | Current Setting | +---------------------------------+---------------------------------+ | REGISTER_INIT | ON** | +---------------------------------+---------------------------------+ | SLAVE_SPI_PORT | DISABLE** | +---------------------------------+---------------------------------+ | MASTER_SPI_PORT | SERIAL | +---------------------------------+---------------------------------+ | CONFIGIO_VOLTAGE_BANK1 | NOT_SPECIFIED* | +---------------------------------+---------------------------------+ | CONFIGIO_VOLTAGE_BANK2 | NOT_SPECIFIED* | +---------------------------------+---------------------------------+ | COMPRESS_CONFIG | OFF** | +---------------------------------+---------------------------------+ | BOOT_SEL | DUAL* | +---------------------------------+---------------------------------+ | MSPI_RESET | DISABLE* | +---------------------------------+---------------------------------+ | MCCLK_FREQ | 106.7 | +---------------------------------+---------------------------------+ | BACKGROUND_RECONFIG | OFF* | +---------------------------------+---------------------------------+ | MULTI_BOOT_MODE | DISABLE* | +---------------------------------+---------------------------------+ | MULTI_BOOT_SEL | STATIC* | +---------------------------------+---------------------------------+ | MSPI_SIGNATURE_TIMER | 200MS* | +---------------------------------+---------------------------------+ | MSPI_CLK_PHASE | RX_RISING_TX_FALLING* | +---------------------------------+---------------------------------+ | MSPI_CPOL | IDLE_CLOCK_LOW* | +---------------------------------+---------------------------------+ | SSPI_CLK_PHASE | RX_RISING_TX_FALLING* | +---------------------------------+---------------------------------+ | SSPI_CPOL | IDLE_CLOCK_LOW* | +---------------------------------+---------------------------------+ | SSPI_SHIFT_ORDER | MSB_FIRST* | +---------------------------------+---------------------------------+ | SSPI_DAISY_CHAIN_MODE | DISABLE* | +---------------------------------+---------------------------------+ | ERASE_EBR_ON_REFRESH | ENABLE* | +---------------------------------+---------------------------------+ | SIGNATURE_CHECK | ENABLE_LSCC_SIGNATURE* | +---------------------------------+---------------------------------+ | MSPI_ADDRESS_32BIT | ENABLE | +---------------------------------+---------------------------------+ | MSPI_COMMAND_32BIT | ENABLE | +---------------------------------+---------------------------------+ | SSPI_IDLE_TIMER | DISABLE* | +---------------------------------+---------------------------------+ | MSPI_PREAMBLE_DETECTION_TIMER | 200MS* | +---------------------------------+---------------------------------+ | DAISY_CHAIN | DISABLE* | +---------------------------------+---------------------------------+ | DAISY_CHAIN_WAIT_DONE | DISABLE* | +---------------------------------+---------------------------------+ | PROGRAMN_RECOVERY | DISABLE* | +---------------------------------+---------------------------------+ | TRANSFR | OFF* | +---------------------------------+---------------------------------+ * Default setting. ** The specified setting matches the default setting. Creating bit map... Bitstream Status: Preliminary Version 2.45. Saving bit stream in "D:/Avant_Versa_RevB/Avant-X Versa Board revB_Blink/impl_1/Blink_RevB_impl_1.bit". Loading register settings... Processing register settings... Writing all register frames... Bitstream generation complete!