#--  Synopsys, Inc.
#--  Version U-2023.03LR-SP1
#--  Project file D:\Avant_Versa_RevB\Avant-X Versa Board revB_Blink\impl_1\run_options.txt
#--  Written on Mon Feb 19 09:55:55 2024


#project files
add_file -constraint "Blink_RevB_impl_1_cpe.ldc"
add_file -verilog "D:/radiant/2024.1/ip/pmi/pmi_lav-at.v"
add_file -vhdl -lib pmi "D:/radiant/2024.1/ip/pmi/pmi_lav-at.vhd"
add_file -verilog -vlog_std v2001 "D:/Avant_Versa_RevB/Avant-X Versa Board revB_Blink/source/impl_1/blink_top.v"
add_file -verilog -vlog_std v2001 "D:/Avant_Versa_RevB/Avant-X Versa Board revB_Blink/pll_H/rtl/pll_H.v"


#implementation: "impl_1"
impl -add impl_1 -type fpga

#
#implementation attributes

set_option -vlog_std v2001
set_option -project_relative_includes 1
set_option -include_path {D:/Avant_Versa_RevB/Avant-X Versa Board revB_Blink;D:/Avant_Versa_RevB/Avant-X Versa Board revB_Blink/pll_H}

#device options
set_option -technology LAV-AT
set_option -part LAV_AT_X70
set_option -package LFG1156C
set_option -speed_grade -3
set_option -part_companion ""

#compilation/mapping options
set_option -top_module "blink_top"

# hdl_compiler_options
set_option -distributed_compile 0
set_option -scm2hydra 0
set_option -scm2hydra_preserve_rtl_sig 1
set_option -hdl_strict_syntax 0
set_option -rtl_xmr_naming 0
set_option -use_module_idb 1

# mapper_without_write_options
set_option -frequency 200
set_option -srs_instrumentation 1

# mapper_options
set_option -write_verilog 0
set_option -write_structural_verilog 0
set_option -write_vhdl 0

# Lattice XP
set_option -maxfan 1000
set_option -disable_io_insertion 0
set_option -retiming 0
set_option -pipe 1
set_option -forcegsr false
set_option -fix_gated_and_generated_clocks 0
set_option -rw_check_on_ram 0
set_option -update_models_cp 0
set_option -syn_edif_array_rename 0
set_option -Write_declared_clocks_only 1
set_option -seqshift_no_replicate 0

# Lattice LAV-AT
set_option -s44_optimization 0
set_option -infer_widefn 1
set_option -bluesteel_adder_decomp_no_mult 1
set_option -pack_rst_largeram 1
set_option -automatic_compile_point 1

# NFilter
set_option -no_sequential_opt 0

# common_options
set_option -add_dut_hierarchy 0
set_option -prepare_readback 0

# flow_options
set_option -use_unified_compile 0
set_option -slr_aware_debug 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1
set_option -multi_file_compilation_unit 1

# Compiler Options
set_option -auto_infer_blackbox 0

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "./Blink_RevB_impl_1.vm"

#set log file 
set_option log_file "D:/Avant_Versa_RevB/Avant-X Versa Board revB_Blink/impl_1/Blink_RevB_impl_1.srf" 
impl -active "impl_1"
