Lattice Radiant Version History

RadiantVersionHistory

    VersionHistory

    Radiant Update 2025.2

    • Device Support:
      • Certus™-NX (LFD2NX)
        • 9 (-7/-8/-9) 1.00V (COM/IND/AUTO) – CSFBGA121, CABGA196
      • Certus™-N2 (LN2-CT)
        • 20ES1 (-1/-2/-3) 0.82V (COM/IND) – CBG484
      • Lattice™ Avant (LAV-AT)
        • E70 (-1/-2/-3) 0.82V (COM/IND) – CBG484, CSG841, LFG1156, LFG676
      • MachXO4™ (LFMXO4) – This new family supports Reveal Debugger, Power Calculator, and bitstream capability.
        • 010HC (-5/-6) 2.5V/3.3V (COM/IND/AUTO) – TSG100, BSG132
        • 010HC (-5/-6) 2.5V/3.3V (COM/IND) – TSG144
        • 010HE (-5/-6) 1.2V (COM/IND/AUTO) – TSG100, BSG132
        • 010HE (-5/-6) 1.2V (COM/IND) – TSG144
        • 015HC (-5/-6) 2.5V/3.3V (COM/IND/AUTO) – TSG100, BSG132, BBG256
        • 015HC (-5/-6) 2.5V/3.3V (COM/IND) – TSG144, BFG256
        • 015HE (-5/-6) 1.2V (COM/IND/AUTO) – TSG100, BSG132, BBG256
        • 015HE (-5/-6) 1.2V (COM/IND) – UUG36, TSG144, BFG256
        • 025HC (-5/-6) 2.5V/3.3V (COM/IND/AUTO) – TSG100, BSG132, BBG256
        • 025HC (-5/-6) 2.5V/3.3V (COM/IND) – TSG144, BFG256
        • 025HE (-5/-6) 1.2V (COM/IND/AUTO) – TSG100, BSG132, BBG256
        • 025HE (-5/-6) 1.2V (COM/IND) – UUG49, TSG114, BFG256
        • 050HC (-5/-6) 2.5V/3.3V (COM/IND/AUTO) – BSG132, BBG256
        • 050HC (-5/-6) 2.5V/3.3V (COM/IND) – TSG144, BFG256, BBG400
        • 050HE (-5/-6) 1.2V (COM/IND/AUTO) – BSG132, TSG114, BBG256
        • 050HE (-5/-6) 1.2V (COM/IND) – UUG81, BFG256, BBG400
        • 080HC (-5/-6) 2.5V/3.3V (COM/IND) – BBG256, BBG400
        • 080HE (-5/-6) 1.2V (COM/IND) – BBG256, BBG400
        • 110HC (-5/-6) 2.5V/3.3V (COM/IND) – BBG256, BBG400, BBG484
        • 110HE (-5/-6) 1.2V (COM/IND) – BBG256, BBG400, BBG484
    • Tool and Other Enhancements:
      • Digital Signature Tab – Support for digital signature has been added in Radiant executables for improve security and authentication.
      • IP – Various IP Cores are now bundled with Lattice Radiant Subscription license starting in Radiant 2025.2 release (i.e. PCIe, Ethernet, (10G & below), DDR4, LPDDR4). For complete list, please refer to the Product Bulletin FPGA-PB-02030 1.0 - Lattice Radiant Software & IP Licensing Updates.
      • LSE – The LSE top-module identification behavior has been updated. If topmodule is not set in the LSE project file, LSE now issues a critical warning in the LSE report file.
      • Reveal
        • Reveal Analyzer waveforms have been improved.
        • Reveal SERDES kit now supports SERDES merge.
      • Synplify Pro
        • Synplify Pro now uses SLICE for register mapping instead of IOL by default.
        • The IO register is now set to “disabled” by default.
      • Timing Analysis
        • The “Overall Summary” section of the timing engine has been updated. Each timing corner now shows one to three lines, depending on the errors found.
        • Nexus Fast Corner STA default setting uses Vccmax for Hold time analysis. Previous releases used Vccmin by default.
      • Timing Constraints – A new Constraint Configuration dialog has been added to support using multiple constraint files. This feature allows users to add, remove, reorder, save, and manage individual constraint files. Only top-level constraint files are supported.

    Radiant Update 2025.1.1

    • Device Support
      • Certus™-NX (LFD2NX)
        • The BBG400 package for LFMXO5-35/65 and LFD2NX-35/65, as well as the CABGA256 package for LFD2NX-25, have been changed from 'generally available' to 'controlled access.'
        • To request for a license, you may raise a ticket to the Submit Support Ticket page.
      • Lattice Avant™-NX (LAV-AT)
        • E50 (-1/-2/-3) 0.82V (COM/IND) – CSG841
      • MachXO5™-NX (LFMXO5)
        • 35T (-7/-8/-9) 1.00V (COM/IND) – BBG256
        • 65T (-7/-8/-9) 1.00V (COM/IND) – BBG256
    • Tool and Other Enhancements
      • Device
        • The license string for -7 speed grade has been removed for LIFCL-17 UWG72 package.
          Note: This is now supported with Radiant free license.
        • The status of the following LAV-AT-E70 packages has been changed from “Advanced” to Preliminary”:
          • LFG676
          • CSG841
          • CBG484
      • Design Tcl Commands – Design commands now support the des_get_ram_cells and des_get_ram_style.
        • des_get_ram_cells retrieves memory cells that are implemented as either distributed RAM or block RAM.
        • des_get_ram_style returns the memory style of a specified RAM cell.
      • Programmer – Status check code after reboot has been removed. This avoids failure when the device exits user mode while STAPL is still trying to read the status register.

    Radiant 2025.1

    • Device Support:
      • Certus™-N2 (LN2-CT-20ES)
        • 22 (-1/-2/-3) 0.82V (COM/IND) – ASG410
      • Certus™-NX (LFD2NX)
        • 9 (-7/-8/-9) 1.00V (COM/IND) – CSFBGA121, CABGA196
        • 15 (-7/-8/-9) 1.00V (COM/IND) – CABGA256, CABGA400
        • 17 (-7/-8/-9) 1.00V (COM/IND/AUTO) – CSFBGA121, CABGA196
        • 25 (-7/-8/-9) 1.00V (COM/IND) – CABGA256, CABGA400
        • 35 (-7/-8/-9) 1.00V (COM/IND) – CABGA400, CABGA484
        • 65 (-7/-8/-9) 1.00V (COM/IND) – CABGA400, CABGA484
      • MachXO5™-NX (LFMXO5)
        • 35 (-7/-8/-9) 1.00V (COM/IND) – BBG400
        • 35T (-7/-8/-9) 1.00V (COM/IND) – BBG484
        • 65 (-7/-8/-9) 1.00V (COM/IND) – BBG400
        • 65T (-7/-8/-9) 1.00V (COM/IND) – BBG484
    • Tool and Other Enhancements:
      • Command Line – The “sspi_cmd” command has been added to run SSPI commands for Nexus and Avant devices.
      • Lattice Synthesis Engine (LSE) – LSE now supports inference of byte write enable True Dual-Port RAM
      • License – The license support has been updated for various MachXO5-NX devices. Refer to the Supported Devices table on page 3 for more information.
      • Low Power Support – Dynamic Clock Control (DCC) has been added to support low power reduction in the LSE tool and MAP. This functionality is currently available as a Beta feature in this release.
      • Power Calculator –– The “(DPM)” text has been added in the Power Summary tab to support the table title Dynamic Power Multiplier.
      • Physical Designer – The "Resource Usage Count" and "Selected Resource Usage Count" sections are now in the Create GROUP dialog box of Physical Designer, showing the total resource count for all instances.
      • Place and Route (PAR)
        • The Physical Synthesis option has been integrated into Place and Route flow. This functionality is currently available as a Beta feature in this release.
        • The QoR improvement option “nexus_extreme” has been added to the PAR command line for Nexus devices. When enabled, the placement engine switches from Simulated Annealing (SA) to Analytical Placer (AP). AP can run faster with better timing results. This option is currently available as a Beta feature in this release.
      • Reports
        • The "Parameter Settings" section has been added to Synthesis Reports, displaying parameters for each instance when the design includes entities with parameters. This feature is available only for LSE.
        • The “Stage Execution Time Summary” section has been added to Project Summary.
        • The resource usage percentage has been added to Report Summary
      • Reveal
        • Support for incremental flow has been added to the post-par Reveal stage.
        • The interface for setting up virtual switch/LED signals has been enhanced for ordering and color coding.
        • A captured waveform can now be saved as an RVA file and reloaded when Reveal Analyzer is reopened.
        • Support for memory controller debug for Avant devices has been added to diagnose and resolve DDR interface issues
      • Strategies
        • The “Set VIRTUAL IO on all ports” strategy has been added to strategy settings. This option adds virtual IO information to MAP reports when enabled.
        • The “Use DCC Insertion” option has been added to LSE options to support low power reduction.
      • TCL Console
        • The Radiant TCL console (radiantc) now supports argument handling.

    Radiant Update 2024.2.1

    • Device Support:
      • Lattice Avant™ (LAV-AT)
        • E50 (-1/-2/-3) 0.82V (COM/IND) – CBG484
        • E70 (-1/-2/-3) 0.82V (COM/IND) – CBG484, LFG676, CSG841, LFG1156
    • Tool and Other Enhancements:
      • Device – Security bitstream and GUI, Programming, and Reveal Debugger have been updated to support the LAV-AT-E50 and LAV-AT-E70 devices.
      • Reveal
        • Reveal debugger (Logic Analyzer and Controller) supports latest Avant-E70 and Avant-E50 silicon.
        • For Avant devices, Reveal supports SerDes debugging with IBERT (Integrated Bit Error Tester) and the optimization of transceiver channels.

    Radiant 2024.2

    • Device Support:
      • Certus™-N2 (LN2-CT-ES)
        • 22K (-1/-2/-3) 0.82V (COM/IND) – ASG410, CBG484
    • Tool and Other Enhancements:
      • Design Rule Checking – Lattice Synthesis Engine (LSE) now supports a standalone design rule checking flow to lint user RTL.
      • Power Calculator
        • The User Entered Tj has been added to Power Calculator Environment section allowing users to enter junction temperature directly.
        • Utilization table for each tab has been added to show the percentage of resources used for each IP after power calculations.
        • For devices that supports boundary scanning, a radio option has been added at the top of the I/O tab allowing users to enable or disable boundary scanning.
      • General Options – The Check Controlled Device License is enabled by default if Radiant is newly installed. You have to manually enable it if you are using previous Radiant versions.
      • Reports – The Radiant Report Summary now includes the IP Summary Report, which displays the Lattice IP utilized in the design.
      • Timing Analyzer – The Waveform tab provides a visual reference to the Data Path, demonstrating how and where the constraints have been applied.
      • Reveal – Reveal now supports beta version of post-PAR Reveal debugger.

    Radiant Update 2024.1.1

    • Device Support:
      • Lattice Avant™ (LAV-AT)
        • E70ES1 (-1/-2/-3) 0.82V (COM/IND) – CSG841
        • Designs targeting the E70 device in 2023.2 or 2023.2.1 should now target the E70ES1 device.
        • For Avant products, this release supports targeting of silicon based on their release status. Refer to the following table for details.
          2024.1 Designator Status Prior Designator
          E70ES1 Engineering Sample E70
          E70 Early Access NA
    • Tool and Other Enhancements
      • Bitstream
        • The IDCODE of LFD2NX-28 and LFD2NX-9 devices have been updated. Due to these changes, regenerating the bitstream is recommended.
      • Foundation IP
        • In the Lattice Avant PLL Module configuration interface, when Enable Dynamic Phase Ports is checked, a Use Phase Advance option is added. When this is enabled, the maximum VCO frequency is reduced. Otherwise, the value remains at 4 GHz.
        • Lattice Avant MPP enables 5G and base video protocols, which include SyncE and DP/eDP.
      • Soft IP
        • By default, the IP on Server and IP Catalog options to “Show latest IP Version only” and “Show IP supported by target device only” are now enabled.
      • Programmer – The Verify Public Key operation has been added to Radiant Programmer.

    Radiant 2024.1

    • Radiant Installer
      • A new version of the Radiant installer has been uploaded to the Lattice website. Installing the latest 2024.1.0.34.2 version is recommended if you are currently using the 2024.1.0.34.1 version or older.
      • Installation Instructions
        Refer to the list below for the instructions to install the new version of the Radiant software. Also ensure that no instances of Radiant are running before attempting to install the new version.
        • To install the new version on Windows:
          1. Extract the zip file and navigate to the location where you want to save it.
          2. Double-click the 2024.1.0.34.2_Radiant.exe file to install the software.
        • To install the new version on Linux:
          1. Extract the zip file and navigate to the location where you want to save it.
          2. Execute the Radiant run file as follows:
            % cd <directory_with_RUN>
            % ./ 2024.1.0.34.2_Radiant_lin.run
        If you are using Lattice Radiant 2024.1 (2024.1.0.34.1), refer to the instructions below.
        • To install the new version on Windows:
          1. Uninstall Lattice Radiant 2024.1 (2024.1.0.34.1).
          2. Extract the zip file and navigate to the location where you want to save it.
          3. Double-click the 2024.1.0.34.2_Radiant.exe file to install the software.
        • To install the new version on Linux:
          1. Uninstall Lattice Radiant 2024.1 (2024.1.0.34.1).
          2. Extract the zip file and navigate to the location where you want to save it.
          3. Execute the Radiant run file as follows:
            % cd <directory_with_RUN>
            % ./ 2024.1.0.34.2_Radiant_lin.run
    • Device Support:
      • Lattice Avant™ (LAV-AT)
        • E70ES1 (-1/-2/-3) 0.82V (COM/IND) – LFG676, CSG841, LFG1156
        • Designs targeting the E70 device in 2023.2 or 2023.2.1 should now target the E70ES1 device.
        • For Avant products, this release supports targeting of silicon based on their release status. Refer to the following table for details.
          2024.1 Designator Status Prior Designator
          E70ES1 Engineering Sample E70
          E70B Production NA
          E70 Early Access NA
      • Certus™-NX (LFD2NX)
        • 9K (-7/-8/-9) 1.00V (COM/IND) – CSFBGA121
        • 28K (-7/-8/-9) 1.00V (COM/IND) – CABGA196, CABGA256, CSFBGA121
    • Tool and Other Enhancements:
      • License
        • The version of Lattice license FlexNet utility and license daemon has been upgraded to v11.19.4.1.
        • The new “LSC_RADIANT_3” RTL encryption key has been added to Radiant to prevent the encrypted RTL in 2024.1 from being used in earlier versions of Radiant.
      • Radiant Installation Wizard
        • The LATTICE_LICENSE_FILE and SALT_LICENSE_SERVER environment user variables have been added to the installation page.
      • The default Flexnet variable LM_LICENSE_FILE is now displayed on the installation page.
    • Foundation IP
      • JESD204B support has been added for the CertusPro-NX (LFCPNX) device.
      • The IP on Server tab in Radiant has been updated to support publishing of third-party IP.
    • Strategies
      • The “Read Write Check on RAM” LSE strategy has been added to Radiant strategy settings for Nexus and Avant devices.
      • Impose Hold Timing Correction strategy has been added to the Radiant Place & Route strategy settings.
    • Block-Based Design
      • The Block-Based Design feature now supports Lattice Synthesis Engine (LSE).
      • Isolation Design Flow has been added to Block-Based Design. This new feature allows you to create prohibited regions that excludes any logic or routing from the rest of the design.
    • Design Rule Checking – DRC has been updated to generate a report which specifies any combinational loops or clocks that have been identified and connected to black box modules.
    • Simulation
      • Radiant software now includes QuestaSim™ Lattice OEM Edition for simulation, debugging, and verification processes. The ModelSim simulator has been replaced by this new tool.
      • Since QuestaSim is a 64-bit application, it can support designs whose memory usage is greater than 4GB during simulation.
    • Power Calculator
      • Watt values in Power Calculator reports are rounded off to 3 digits after the decimal point.
      • When using Avant, the Power Screen field is available for selecting power screen options based on device license.
    • Disable Message Tcl Command – Warning and info messages can now be disabled using the msg_disable Tcl command.
    • Programmer – “Verify feature row” and “Verify lock policies” operations for generating VME have been added to Programmer.
    • Reveal
      • Reveal Inserter provides the option to choose between the standard RTL (Pre-Synthesis) and the Post-Synthesis debug flows. Post-synthesis debugging allows easier monitoring of debug signals and the insertion of debug logic after a design has been synthesized.
      • Configuring User Memory Setup section has been updated.
      • When debugging a JTAG chain, bypass instruction can be used to select or isolate specific devices to debug or to skip.
      • In the Eye Diagram interface, “Unit Interval” has been changed to “Phase Step” and “Voltage” has been changed to “Vertical Step”.
    • IP Packager – New Tcl commands have been added for IP Packager.
    • Export Files – Gate-level simulation and IBIS files are set to “Disabled” by default in creating a new project.
    • Tool Options – Centralized management for individual and group settings is now supported in Tool Options.
    • Timing Constraints
      • The Timing Analyzer now supports set_false_path -setup and -hold options.
      • Generated clocks now include -add and -master_clock parameters.
    • Timing Tcl Commands
      • All sta_report_timing commands now support the -file and -app options. The -file command saves the result to a file whose name is provided after the -file option, and the -app flag informs the command to append the report instead of overwriting the file.
    • Hardware Data File
      • The DDR delay code settings has been updated for the MachXO5-NX (LFMXO5) device.
      • CertusPro-NX (LFCPNX)
        • Differential 100ohm termination for input differential IO types has been added to the CertusPro-NX (LFCPNX) .ibs file.
        • On-die termination (ODT) support for input and bidirectional models have been fixed for CertusPro-NX (LFCPNX) IBIS models.
      • Hard DPHY now captures the rising edge of the byte clock of u_txwordclkhs (UTWDCKHS).

    Radiant Update 2023.2.1

    • Device Support:
      • CertusPro™-NX (LFCPNX)
        • 50K (-9/-8/-7) 1.0V (AUTO) – ASG256, CBG256, BFG484.
    • Tool and Other Enhancements:
      • Primitives
        • OUTDELAYC primitive has been added for CertusPro-NX device.
      • Device Constraint Editor
        • 75Mhz selection has been added for MCCLK_FREQ.
      • MAP – DRC errors regarding shared configuration pin usage for Nexus devices have been resolved.
      • Timing Data – DPHY timing arcs to fix unconstrained path have been updated for Nexus device.
      • Reveal
        • JTAGhub feature modules have been enhanced for Nexus and Avant devices.
        • Pooling of data while SEDC is running has been enhanced for Reveal Controller and Reveal Analyzer.
      • Hardware Data File
        • Minimum pulse width (MPW) has been aligned with datasheet for CrossLink-NX device.
        • Correlation for CertusPro-NX (LFCPNX) IBIS Model has been resolved.

    Radiant 2023.2

    • Device Support:
      • Lattice Avant™ (LAV-AT)
        • E70 (-1/-2/-3) 0.82V (COM/IND) – LFG676, LFG1156
          • 500E has been renamed to E70.
      • CrossLink™-NX (LIFCL)
        • 33U (-7/-8) 1.00V (COM/IND) – FCCSP104
        • 33U (-8) 1.00V (COM/IND) – WLCSP84
    • Tool and Other Enhancements:
      • Device Selector – The device information of the LAV-AT device (E70) has been updated to add 637000 System Logic Cells (LCs).
      • Lattice Synthesis Engine (LSE) – LSE now supports the LAV-AT device.
      • Foundation IP – LAV-AT-E design needs to be re-generated for the Foundation IP/Soft IP. You also need to re-compile the design and re-generate the bitstream.
      • Primitives – The following primitives have been added for the LAV-AT device:
        • DDRPHY64C and DDRPHY72C
        • DDRPHY16D, DDRPHY32D, and DDRPHY64D
        • DDRPHY16E, DDRPHY32E, and DDRPHY64E
        • CONFIG_DONE and CONFIG_LMMIC
        • ECLKDIVA and ECLKSYNCA
        • OSCE
      • GPIO Pins – For the LAV-AT device, each HPIO banks now have 1 EXT_RES dedicated pins.
      • IBIS Models – IBIS has been enhanced to include sysCONFIG pins for the LAV-AT device.
      • Third-Party Simulation Tools – Cadence Xcelium and Synopsys VCS now support the LAV-AT device.
      • MAP – For all Nexus devices, mapper issues DRC if ECLKSYNC is missing from the ECLKDIV input.
      • Place & Route Timing Analysis – Running PAR Timing Analysis is now required for Nexus devices.
      • Static Timing Analyzer (STA) – The STA introduces automated multi-corner Static Timing Analysis reporting to all Nexus devices which eliminates manual operations.
        • While the PAR report includes multi-corner timing, it is recommended to run STA and analyze the timing results at each corner in the STA timing report.
      • CDC Register – The CDC_register attribute allows you to constrain CDC (Clock Domain Crossing) synchronization registers for placement and timing analysis.
      • SEI Editor – The multi-bit (2-bit) error option has been added to the SEI Editor for all Nexus devices.
      • Programmer
        • To enable a robust Dual Boot and Ping-Pong functionality, the bitstream of LFMXO5-25, LFMXO5-55T, and LFMXO5-100T devices with embedded flash memory needs to be re-generated.
        • Deployment Tool now allows adding user data while generating Dual Boot and Ping-Pong features.
      • Strategies – The default value of the GSR Infer strategy has been changed to “OFF” for Synplify, LSE, and MAP.
      • Block-Based Design – The Exclusive option has been added to Physical Designer for reused macros.
      • IP Generator – The IP Generator has been enhanced to be able to provide VHDL top-level file capability.
      • License File – The TS_OK option has been enabled for Radiant subscription license. This option allows you to run the Radiant software on a remote connection.
      • File List – In File List View, you can now manually set top-level modules by right-clicking on an input file.
      • Inclusive Language – Radiant documentation has been partially updated to follow Lattice’s Inclusive Language guidelines.
        • The following terms have been updated:
          • Master SPI has been changed to Controller SPI.
          • Slave SPI has been changed to Target SPI.
      • Simulation Wizard
        • Simulation Wizard now supports the "-t" option. This option has been added to specify the time resolution of the simulator for VHDL resolution in mixed-language simulations.
        • The “sim_generate_script” Tcl command has been added for Simulation Wizard. You can use this command to generate any file types from your current Radiant project.
      • TCL Enhancement – New Tcl commands have been added to support project and non-project flows.
        • STA Tcl commands have been added allowing you to query the timing database and generate timing reports or data without having to recompile the design.
      • Test Fixture Template – The GSR instance has been added to the Test Fixture Template for Avant and Nexus devices.

    Radiant Update 2023.1.1

    • Tool and Other Enhancements:
      • PLL Foundation IP – The Fractional-N settings were updated to improve PLL design stability for all Nexus devices.