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MachXO3

Futureproof your control PLD and bridging designs

Related Products

Simplified Control PLD Design and Debug – With multiple I/O banks, a wide range of signaling standards, per-pin programmability and the highest I/O-to-Logic ratio in the industry - Don’t trade off features and functionality. Integrate more capabilities into MachXO3 device family with up to 9400 LUTs and 384 I/O.

Secure and Reliable – Protect your designs from malicious attacks using password protection, and mitigate soft errors through state of the art Soft Error Detection and Soft Error Correction features.

Extended Temperature Flexibility – Realize your next automotive or rugged environmental design with automotive AEC-Q100 qualified XO3LF devices.

Features

  • Up to 9400 LUTs with up to 384 I/O pins
  • Instant-on 1 ms boot-up with background upgrade, Hitless I/O reconfigure and dual-boot error recovery
  • Available with 3.3/2.5 V core or low power 1.2 V core – including additional options on 9400 LUT devices
  • MachXO3LF includes programmable Flash and User Flash Memory (UFM)
  • Available in amazingly small (2.50 x 2.50 mm, 0.4 mm pitch) WLCSP packages and BGA packages with 0.50 mm and 0.80 mm pitch
Automotive

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MachXO3 Device Selection Guide
PARAMETERS MachXO3L-640/
MachXO3LF-640		 MachXO3L-1300/
MachXO3LF-1300		 MachXO3L-2100/
MachXO3LF-2100		 MachXO3L-4300/
MachXO3LF-4300		 MachXO3L-6900/
MachXO3LF-6900		 MachXO3L-9400/
MachXO3LF-9400
Density LUTs 640 1300 2100 4300 6900 9400
Distributed RAM (kbits) 5 10 16 34 54 73
EBR SRAM (kbits) 64 64 74 92 240 432
UFM (kbits, MachXO3LF only) 64 64 80 96 256 448
VCC = 2.5 V/3.3 V - Yes
 Yes
 Yes
 Yes
 Yes
VCC = 1.2 V Yes
 Yes
 Yes
 Yes
 Yes
 Yes
Temperature Grades1 C / I / A2 C / I / A2 C / I / A2 C / I / A2 C / I C / I
PLL 1 1 1 2 2 2
I2C 2 2 2 2 2 2
SPI 1 1 1 1 1 1
Timer/Counter 1 1 1 1 1 1
Oscillator 1 1 1 1 1 1
MIPI D-PHY Support Yes Yes Yes Yes Yes Yes
Multi Time Programmable NVCM MachXO3L MachXO3L MachXO3L MachXO3L MachXO3L MachXO3L
Programmable Flash MachXO3LF MachXO3LF MachXO3LF MachXO3LF MachXO3LF MachXO3LF

1. C = Commercial, I = Industrial, A = Automotive
2. Automotive grade devices available in MachXO3LF only

0.4 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
36-ball WLCSP (2.5 x 2.5 mm)1
28



49-ball WLCSP (3.2 x 3.2 mm)1

38


81-ball WLCSP (3.8 x 3.8 mm)1


63

0.5 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
100-pin TQFP (14 x 14 mm) 794 794 794


121-ball csfBGA (6 x 6 mm)1 100 100 100 100

132-ball csBGA (8 x 8 mm) 1044 1044 1044 1044

256-ball csfBGA (9 x 9 mm)1
206 206 206 206 206
324-ball csfBGA (10 x 10 mm)1

268 268 281
0.8 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
256-ball caBGA (14 x 14 mm)
2064 2064 2064 2062 2063
324-ball caBGA (15 x 15 mm)

2794 2794 2792
400-ball caBGA (17 x 17 mm)


3352 3352 3353
484-ball caBGA (19 x 19 mm)




3843

1. Package is only available for E=1.2 V devices
2. Package is only available for C=2.5 V/3.3 V devices
3. Package is available for both E=1.2 V and C=2.5/3.3 V devices
4. Package is available in automotive grade (MachXO3LF only)

Example Solutions

Control PLDExpand Image

Control PLD

  • Non-volatile PLD (640 to 9400 LUTs & 28 to 384 I/O) provides widest application coverage in servers, communication boxes and industrial controllers.
  • Reduce cost and BOM by integrating hardware management functions, such as power thermal management and control PLD, into MachXO3 and L-ASC10.
  • Add features and fix bugs in-system without interrupting the system operation through Hitless I/O.
  • Complete board debug faster through on-chip debug using Reveal.
MachXO3 - Motor Control ApplicationExpand Image

Motor Control Interface with MachXO3

  • Flexibility to interface with variety of motors used in Industrial, Automotive and other embedded systems
  • IGBT Protection and SPI interface allows real-time feedback to the MCU
  • Flexibility to support different communication standards at low power and fast response
  • Small footprint to accommodate space constrained applications
MachXO3 - Battery Management SystemExpand Image

Battery Management Control using MachXO3

  • MachXO3 provides controller for the battery management for mobile and portable embedded systems
  • Intelligent cell balancing for charge equalization for each battery cell.
  • Control charge/ discharge process and receive real-time battery information like State of Charge (SOC) and State of Health (SOH)
Interface_expansionExpand Image

Microprocessor Interface Expansion

  • Save cost by adding GPIO to low-cost microcontrollers
  • Add additional SPI and I2C interfaces to system control processors
  • Perform voltage level translation with ease
  • Simplify system management with PLD implementation of system status registers
MIPI CSI2 DiagramExpand Image

CSI-2 Image Sensor Interfacing

  • Supports CSI-2 High Speed Differential Signaling
    • Both Rx and Tx interfaces
  • From 1-4 lanes of CSI-2 at up to 900 Mbps
  • Can be implemented in a 49 wlcsp (3.2 x 3.2 mm)
  • RAW, YUV or RGB supported
MIPI Application DiagramExpand Image

DSI LCD Display Interfacing

  • Supports DSI transmit signaling
    • HS (High Speed) Mode transmit
    • LP (Low Power) Mode transmit and receive
  • Can be implemented in a 49 wlcsp (3.2 x 3.2 mm)
  • Supports DSI formats RGB, YCbCr and User Defined
  • Input bus can also be DSI to enable LCD screen replacement

Videos

Single SCM and Dual HPM LTPI solution
Expand Video

Single SCM and Dual HPM LTPI solution

This demo is designed to support two separate Host Processor Modules (HPMs) with a single Security Control Module (SCM). It supports two independent LVDS Tunneling Protocols and Interfaces (LTPI) over a single SCM CPLD design.
VVDN Thermal Core and Weapon Sight
Expand Video

VVDN Thermal Core and Weapon Sight

The Thermal Core and weapon sight is designed for defense applications, providing intelligent night vision capabilities for tactical forces. It enables thermal weapon sight and identification of weapons while processing at the edge. The Lattice MachXO3™ Family 2100 Cells 65nm Technology 1.2V 49-Pin WLCSP T/R is used to convert parallel (8-bit) video data to MIPI-CSI, playing a crucial role in the overall edge processing.
Control PLD for Embedded System Design
Expand Video

Control PLD for Embedded System Design

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Development Kits & Boards

Our development boards & kits help streamline your design process

Complete Design Flows, High Ease of Use

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-020111.210/11/2019PDF2.1 MB
I3C Controller Driver API Reference
FPGA-TN-023421.012/21/2023PDF894.8 KB
I3C Target Driver API Reference
FPGA-TN-023381.012/21/2023PDF769.7 KB
Implementing High-Speed Interfaces with MachXO3 Devices
FPGA-TN-020571.36/17/2021PDF3.4 MB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.012/16/2025ZIP3.2 MB
MachXO3 121-Pin csfBGA Package Migration File
1.23/1/2015CSV14.8 KB
MachXO3 256-Pin caBGA Package Migration File
1.37/27/2016CSV37.7 KB
MachXO3 256-Pin csfBGA Package Migration File
1.37/27/2016CSV37.7 KB
MachXO3 324-Pin caBGA Package Migration File
1.23/1/2015CSV29 KB
MachXO3 324-Pin csfBGA Package Migration File
1.23/1/2015CSV28.7 KB
MachXO3 400-caBGA Package Migration File
1.37/27/2016CSV35.3 KB
MachXO3 Family Data Sheet
FPGA-DS-020323.43/17/2025PDF2.5 MB
MachXO3 Family Data Sheet Supplement for LVCMOS10 Inputs and BIDIs
DS1047 S1.14/28/2016PDF299.1 KB
MachXO3 Hardware Checklist
FPGA-TN-020611.711/5/2025PDF682.6 KB
MachXO3 Programming and Configuration User Guide
FPGA-TN-020553.38/5/2025PDF1.3 MB
MachXO3 Soft Error Detection (SED)/Correction (SEC) User Guide
FPGA-TN-020621.510/21/2024PDF553.1 KB
MachXO3 sysCLOCK PLL Design and User Guide
FPGA-TN-020581.51/25/2022PDF2.2 MB
MachXO3 sysI/O User Guide
FPGA-TN-020562.07/2/2025PDF1.1 MB
MachXO3 Using Password Security
FPGA-TN-020721.28/22/2023PDF394.5 KB
MachXO3-1300 Pinout
FPGA-SC-020561.38/5/2024CSV8.4 KB
MachXO3-1300 Pinout 256 Ball
1.19/22/2014CSV14 KB
MachXO3-2100 Pinout
FPGA-SC-020651.38/5/2024CSV18.1 KB
MachXO3-2100 Pinout 324 Ball
1.19/22/2014CSV17.9 KB
MachXO3-4300 Pinout
FPGA-SC-020661.38/5/2024CSV24.8 KB
MachXO3-4300 Pinout 400 Ball
1.19/22/2014CSV20.7 KB
MachXO3-640 Pinout
FPGA-SC-020641.28/5/2024CSV7.9 KB
MachXO3-6900 Pinout
1.29/22/2014CSV28.1 KB
MachXO3-9400 Pinout
1.06/6/2016CSV28.4 KB
Memory Usage Guide for MachXO3 Devices
FPGA-TN-020601.27/24/2020PDF4.3 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-020901.412/11/2025PDF957.3 KB
Package Diagrams
FPGA-DS-020538.58/5/2025PDF9.4 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
Power and Thermal Estimation and Management for MachXO3 Devices
FPGA-TN-020591.75/20/2024PDF529.7 KB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-021151.11/26/2022PDF708.9 KB
Temperature Excursion User Guide for MachXO3 and MachXO4 Devices
FPGA-TN-022631.212/11/2025PDF373 KB
Thermal Management
FPGA-TN-020445.812/11/2025PDF1.1 MB
Triple-Speed Ethernet Driver API Reference
FPGA-TN-023411.26/26/2025PDF568.1 KB
Using Hardened Control Functions in MachXO3 Devices
FPGA-TN-020631.73/19/2025PDF1.4 MB
Using Hardened Control Functions in MachXO3 Devices Reference Guide
FPGA-TN-020642.31/5/2026PDF1.7 MB
Using TraceID
FPGA-TN-020842.912/11/2025PDF491.6 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-023121.16/23/2022PDF236.5 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

TITLENUMBERVERSIONDATEFORMATSIZE
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Die Sale Datasheet
DS10511.03/2/2015PDF731.3 KB
MachXO3 Family Data Sheet
FPGA-DS-020323.43/17/2025PDF2.5 MB
MachXO3 Family Data Sheet Supplement for LVCMOS10 Inputs and BIDIs
DS1047 S1.14/28/2016PDF299.1 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-020111.210/11/2019PDF2.1 MB
I3C Controller Driver API Reference
FPGA-TN-023421.012/21/2023PDF894.8 KB
I3C Target Driver API Reference
FPGA-TN-023381.012/21/2023PDF769.7 KB
Implementing High-Speed Interfaces with MachXO3 Devices
FPGA-TN-020571.36/17/2021PDF3.4 MB
MachXO3 Hardware Checklist
FPGA-TN-020611.711/5/2025PDF682.6 KB
MachXO3 Programming and Configuration User Guide
FPGA-TN-020553.38/5/2025PDF1.3 MB
MachXO3 Soft Error Detection (SED)/Correction (SEC) User Guide
FPGA-TN-020621.510/21/2024PDF553.1 KB
MachXO3 sysCLOCK PLL Design and User Guide
FPGA-TN-020581.51/25/2022PDF2.2 MB
MachXO3 sysI/O User Guide
FPGA-TN-020562.07/2/2025PDF1.1 MB
MachXO3 Using Password Security
FPGA-TN-020721.28/22/2023PDF394.5 KB
Memory Usage Guide for MachXO3 Devices
FPGA-TN-020601.27/24/2020PDF4.3 MB
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-020811.18/27/2024PDF2.6 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-020901.412/11/2025PDF957.3 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
Power and Thermal Estimation and Management for MachXO3 Devices
FPGA-TN-020591.75/20/2024PDF529.7 KB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-021151.11/26/2022PDF708.9 KB
Single Event Upset (SEU) Report for MachXO2, MachXO3, and MachXO3D
FPGA-TN-021461.211/30/2023PDF261 KB
Temperature Excursion User Guide for MachXO3 and MachXO4 Devices
FPGA-TN-022631.212/11/2025PDF373 KB
Thermal Management
FPGA-TN-020445.812/11/2025PDF1.1 MB
Triple-Speed Ethernet Driver API Reference
FPGA-TN-023411.26/26/2025PDF568.1 KB
Using Hardened Control Functions in MachXO3 Devices
FPGA-TN-020631.73/19/2025PDF1.4 MB
Using Hardened Control Functions in MachXO3 Devices Reference Guide
FPGA-TN-020642.31/5/2026PDF1.7 MB
Using TraceID
FPGA-TN-020842.912/11/2025PDF491.6 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-023121.16/23/2022PDF236.5 KB
TITLENUMBERVERSIONDATEFORMATSIZE
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MachXO3 100-Pin TQFP Package Migration File
FPGA-SC-020671.08/9/2024CSV9 KB
MachXO3 121-Pin csfBGA Package Migration File
1.23/1/2015CSV14.8 KB
MachXO3 132-Pin csBGA Package Migration File
FPGA-SC-020681.08/8/2024CSV15.9 KB
MachXO3 256-Pin caBGA Package Migration File
1.37/27/2016CSV37.7 KB
MachXO3 256-Pin csfBGA Package Migration File
1.37/27/2016CSV37.7 KB
MachXO3 324-Pin caBGA Package Migration File
1.23/1/2015CSV29 KB
MachXO3 324-Pin csfBGA Package Migration File
1.23/1/2015CSV28.7 KB
MachXO3 400-caBGA Package Migration File
1.37/27/2016CSV35.3 KB
MachXO3-1300 Pinout
FPGA-SC-020561.38/5/2024CSV8.4 KB
MachXO3-1300 Pinout 256 Ball
1.19/22/2014CSV14 KB
MachXO3-2100 Pinout
FPGA-SC-020651.38/5/2024CSV18.1 KB
MachXO3-2100 Pinout 324 Ball
1.19/22/2014CSV17.9 KB
MachXO3-4300 Pinout
FPGA-SC-020661.38/5/2024CSV24.8 KB
MachXO3-4300 Pinout 400 Ball
1.19/22/2014CSV20.7 KB
MachXO3-4300-CABGA256-DD
1.01/10/2024CSV12.6 KB
MachXO3-640 Pinout
FPGA-SC-020641.28/5/2024CSV7.9 KB
MachXO3-6900 Pinout
1.29/22/2014CSV28.1 KB
MachXO3-6900-CABGA324-DD
1.01/10/2024CSV14.6 KB
MachXO3-6900-CABGA400-DD
1.03/19/2024CSV14.7 KB
MachXO3-9400 Pinout
1.06/6/2016CSV28.4 KB
MachXO3-9400-CABGA484-DD
1.01/10/2024CSV20.2 KB
Package Diagrams
FPGA-DS-020538.58/5/2025PDF9.4 MB
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DSI Rx Reference Design - Documentation
FPGA-RD-020681.41/22/2021PDF1.1 MB
DSI Rx Reference Design - Source Code
RD11851.41/1/2015ZIP1.6 MB
HiSPi-to-Parallel Sensor Bridge
FPGA-RD-020691.44/1/2014PDF1013.1 KB
HiSPi-to-Parallel Sensor Bridge - Source Code
RD11201.34/9/2014ZIP342.6 KB
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD10055.83/6/2014PDF987.4 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD10055.91/10/2015ZIP809.7 KB
I2C Controller for Serial EEPROMs - Documentation
RD10062.63/5/2014PDF767.9 KB
I2C Controller for Serial EEPROMs - Source Code
RD10062.71/12/2015ZIP613.5 KB
I2C Master with WISHBONE Bus Interface - Documentation
RD10461.61/15/2015PDF1.4 MB
I2C Master with WISHBONE Bus Interface - Source Code
RD10461.82/1/2016ZIP1.4 MB
I2C Slave Peripheral using Embedded Function Block - Documentation
FPGA-RD-020731.511/8/2021PDF1.1 MB
I2C Slave Peripheral using Embedded Function Block - Source Code
FPGA-RD-020731.511/8/2021ZIP1015.5 KB
I2C to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-021901.05/16/2020PDF1.5 MB
I2C to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-021901.05/16/2020ZIP1.3 MB
I2S Controller with WISHBONE Interface Reference Design - Source Code
RD11011.13/1/2014ZIP1.6 MB
I2S Controller with WISHBONE Interface Reference Design Documentation
RD11011.13/1/2014PDF2.4 MB
LatticeMico8 Core - Documentation
RD10262.02/1/2014PDF2 MB
LatticeMico8 Core Source Code
RD10262.02/1/2014ZIP1.6 MB
LED/OLED Driver - Documentation
RD11031.13/1/2014PDF989.6 KB
LED/OLED Driver - Source code
RD11031.13/1/2014ZIP1.4 MB
LVDS Tunneling Protocol and Interface Reference Design – User Guide
FPGA-RD-022471.510/27/2025PDF3.5 MB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge
RD11461.412/28/2016ZIP4.3 MB
MIPI CSI2-to-CMOS Parallel Sensor Bridge - Documentation
FPGA-RD-021311.61/31/2021PDF1.4 MB
Parallel to MIPI CSI-2 TX Bridge - Documentation
FPGA-RD-021321.68/19/2021PDF1.1 MB
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD11831.51/1/2015ZIP1.2 MB
Parallel to MIPI DSI TX Bridge - Documentation
FPGA-RD-021331.61/31/2021PDF1.2 MB
Parallel to MIPI DSI TX Bridge - Source Code
RD11841.51/1/2015ZIP2.6 MB
PWM Fan Controller
RD10601.69/10/2014PDF481.5 KB
PWM Fan Controller - Source Code
RD10601.71/16/2015ZIP2.9 MB
Read and Write Usercode - Documentation
RD10411.49/17/2014PDF831.5 KB
Read and Write Usercode - Source Code
RD10411.33/1/2014ZIP618.2 KB
SD Flash Controller Using SD Bus - Documentation
RD10881.43/12/2014PDF1.4 MB
SD Flash Controller Using SD Bus - Source Code
RD10881.43/12/2014ZIP5 MB
SDR SDRAM Controller - Documentation
RD11741.13/1/2014PDF1.4 MB
SDR SDRAM Controller - Source Code
RD11741.13/1/2014ZIP2.6 MB
SPI Slave Peripheral Using the Embedded Function Block
RD11251.31/1/2015PDF1.2 MB
SPI Slave Peripheral Using the Embedded Function Block Reference Design
RD11251.31/1/2015ZIP730.6 KB
SPI to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-021911.05/16/2020PDF1.6 MB
SPI to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-021911.05/16/2020ZIP1.3 MB
SPI WISHBONE Controller - Documentation
RD10441.73/1/2014PDF960 KB
SPI WISHBONE Controller - Source Code
RD10441.81/12/2015ZIP477.7 KB
WISHBONE UART - Documentation
FPGA-RD-021371.72/5/2021PDF1.1 MB
WISHBONE UART - Source Code
RD10421.612/1/2014ZIP58.5 MB
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I2C Read-back Failure Mode on Specific Use Scenario in MachXO2 and MachXO3 Products and Work-Around Solutions Product Bulletin
PB14121.13/4/2015PDF179.4 KB
MachXO2/MachXO3/LPTM21 WISHBONE Flash Corruption Avoidance
PB13811.11/3/2017PDF88.9 KB
Work-around Solution for Platform Manager 2, MachXO2, and MachXO3 in SPI Programming Failure Modes
PB2311011.01/11/2024PDF372.2 KB
TITLENUMBERVERSIONDATEFORMATSIZE
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PCN 03A-16 MachXO2/XO3 Datasheet Change
Data Sheet		1.13/22/2016PDF367.7 KB
PCN04A-18 fcBGA Backend Assy Transfer ATP to ATK
A6/26/2018PDF286.7 KB
PCN06A-17 MachXO3 data sheet and package materials change
1.110/24/2017PDF199.9 KB
PCN09A-19 ASEK Second Source Qualification for Selected Products
1/9/2020PDF359 KB
PCN09A-19 BOM comparison final
2.01/8/2020XLSX24.8 KB
PCN09A-19 Consolidation Qual External Changes
1/9/2020PDF326.2 KB
Power Calculator Update for All XO2 and Derivative (XO2/XO3L/XO3LF/XO3D/PlatformManager2) Devices
PCN02A-201.11/14/2021PDF28.6 KB
Standard OPNs for ASEK PCN09A-19
2.01/8/2020XLSX24.4 KB
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Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.012/16/2025ZIP3.2 MB
TITLENUMBERVERSIONDATEFORMATSIZE
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Lattice FPGA Product Selector Guide
v25.3.01/6/2026PDF717 KB
MachXO3 Product Brief
I02384.010/27/2020PDF606.5 KB
MIPI Display Serial Interface Solution Product Flyer
I02412.010/22/2013PDF1.8 MB
TITLENUMBERVERSIONDATEFORMATSIZE
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BG256 MachXO3-9400
Rev L5/11/2022PDF140.9 KB
BG256_XO2
Rev O16/9/2022PDF75.3 KB
BG256_XO3
Rev. O16/9/2022PDF75.3 KB
BG324_XO3
Rev G16/9/2022PDF141.7 KB
BG400 MachXO3-9400
Rev B16/9/2022PDF141.6 KB
BG400_XO3
Rev H16/9/2022PDF140.6 KB
BG484 MachXO3-9400
Rev B26/9/2022PDF141.2 KB
MachXO3L/MachXO3LF Product Family Qualification Summary
N10/5/2020PDF1.2 MB
MG121_XO3
Rev H10/17/2024PDF190.2 KB
MG256_XO3
Rev G12/21/2021PDF172.1 KB
MG324
Rev G10/17/2024PDF148.4 KB
UWG36
Rev C24/21/2022PDF130.4 KB
UWG49_XO2_XO3
Rev F16/25/2020PDF27.8 KB
UWG81
Rev G5/1/2024PDF700.1 KB
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Distributed PLD Solution for Reduced Server Cost and Increases Flexibility
WP0091.08/1/2017PDF708.1 KB
Leveraging MIPI D-PHY-based Peripherals in Embedded Designs
1.05/1/2014PDF567.3 KB
Multi-time Programmable ULD FPGAs
1.012/1/2013PDF163.5 KB
Revolutionary Hardware Management Solutions
WP00034.05/9/2018PDF1.4 MB
Upscale Your Product and Rebuild Business Resiliency – Migrating to Lattice FPGAs
WP00381.05/15/2024PDF2.2 MB
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MachXO3 Infographic
1.06/22/2015PDF5.6 MB
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[BSDL] LCMXO3L-1300C CABGA256
1.69/25/2014BSM42.7 KB
[BSDL] LCMXO3L-1300E CSFBGA121
1.74/13/2016BSM25.4 KB
[BSDL] LCMXO3L-1300E CSFBGA256
1.74/5/2016BSM42.7 KB
[BSDL] LCMXO3L-1300E WLCSP36
1.74/5/2016BSM18.9 KB
[BSDL] LCMXO3L-2100C CABGA256
1.69/25/2014BSM42.7 KB
[BSDL] LCMXO3L-2100C CABGA324
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[BSDL] LCMXO3L-4300C CABGA256
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[BSDL] LCMXO3L-4300E CSFBGA121
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[BSDL] LCMXO3L-4300E CSFBGA324
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[BSDL] LCMXO3L-640E CSFBGA121
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[BSDL] LCMXO3L-6900E CSFBGA256
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[BSDL] LCMXO3L-6900E CSFBGA324
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[BSDL] LCMXO3L-9400C CABGA256
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[BSDL] LCMXO3L-9400C CABGA484
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[BSDL] LCMXO3L-9400E CABGA256
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[BSDL] LCMXO3LF-1300C CABGA256
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[BSDL] LCMXO3LF-1300E WLCSP36
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[BSDL] LCMXO3LF-2100C/E CSFBGA132 and TQFP100
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[BSDL] LCMXO3LF-2100E CSFBGA256
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[BSDL] LCMXO3LF-2100E CSFBGA324
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[BSDL] LCMXO3LF-2100E WLCSP49
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[BSDL] LCMXO3LF-4300C CABGA256
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[BSDL] LCMXO3LF-4300C CABGA324
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[BSDL] LCMXO3LF-4300C CABGA400
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[BSDL] LCMXO3LF-4300C/E CSFBGA132
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[BSDL] LCMXO3LF-4300E CSFBGA121
1.24/5/2016BSM37.5 KB
[BSDL] LCMXO3LF-4300E CSFBGA256
1.24/5/2016BSM47.3 KB
[BSDL] LCMXO3LF-4300E CSFBGA324
1.24/5/2016BSM52.7 KB
[BSDL] LCMXO3LF-4300E WLCSP81
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[BSDL] LCMXO3LF-640E CSFBGA121
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[BSDL] LCMXO3LF-640E CSFBGA132 and TQFP100
FPGA-MD-020681.08/28/2024ZIP10.6 KB
[BSDL] LCMXO3LF-6900C CABGA256
1.05/19/2015BSM51.2 KB
[BSDL] LCMXO3LF-6900C CABGA324
1.05/19/2015BSM57.2 KB
[BSDL] LCMXO3LF-6900C CABGA400
1.05/19/2015BSM62.4 KB
[BSDL] LCMXO3LF-6900E CSFBGA256
1.24/5/2016BSM51.1 KB
[BSDL] LCMXO3LF-6900E CSFBGA324
1.24/5/2016BSM57.3 KB
[BSDL] LCMXO3LF-9400C CABGA256
1.14/13/2016BSM54.5 KB
[BSDL] LCMXO3LF-9400C CABGA400
1.14/13/2016BSM65.8 KB
[BSDL] LCMXO3LF-9400C CABGA484
1.14/13/2016BSM70.8 KB
[BSDL] LCMXO3LF-9400E CABGA256
1.210/16/2018BSM54.6 KB
[BSDL] LCMXO3LF-9400E CSFBGA256
1.14/13/2016BSM54.5 KB
TITLENUMBERVERSIONDATEFORMATSIZE
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[IBIS] Lattice MachXO3
FPGA-MD-020832.110/16/2024ZIP10.7 MB
TITLENUMBERVERSIONDATEFORMATSIZE
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PCB Routing Example XO3
1.010/8/2014ZIP2.8 MB

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