System wide control of DC/DCs and resets – This demo shows 31 pseudo DC/DC enables and/or reset signals sequenced from a central control point.
Fault logging with timestamp – Over and under voltage faults are recorded in non-volatile memory with a 32 bit timestamp.
Scalable architecture – This demo illustrates how adding L-ASC10s to a design can expand system management while maintain a central point of control.
Features
- Four separate Power Planes are monitored and sequenced from a central control point
- Over or under voltage faults are stored in user flash memory (UFM)
- Fault logs include a timestamp of 32 bits with one second resolution
- Fault logs can be read and cleared
- Individual Power Planes can be sequenced down – replaced – and sequenced up
