The Lattice Semiconductor CSI-2/DSI D-PHY Transmitter IP Core converts data bytes from a requestor to either DSI or CSI-2 data format for the Lattice Avant™, Nexus™, and Nexus 2 platforms. The CSI-2/DSI D-PHY Transmitter Submodule IP is intended for applications that require a D-PHY transmitter in the FPGA logic.
Latest Resource Utilization details are available in the IP Core User Guide.
Features
- Compliant with MIPI D-PHY v2.1, MIPI DSI v1.3, and MIPI CSI-2 v1.2 specifications.
- Supports 1, 2, 3, or 4 MIPI D-PHY data lanes.
- Supports DSI video modes.
- Supports low-power (LP) mode during vertical and horizontal blanking.
