The Lattice Semiconductor RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).
Resource Utilization details are available in the IP Core User Guide.
The RISC-V MC CPU IP Core is provided at no additional cost with Lattice Propel Builder.
Quick Reference |
| TITLE | NUMBER | VERSION | DATE | FORMAT | SIZE | ||
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| RISC-V MC CPU IP - Lattice Propel Builder 2025.2 User Guide | FPGA-IPUG-02300 | 1.0 | 12/11/2025 | 956.7 KB | |||
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| TITLE | NUMBER | VERSION | DATE | FORMAT | SIZE | ||
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| RISC-V MC CPU IP - Lattice Propel Builder 2025.2 User Guide | FPGA-IPUG-02300 | 1.0 | 12/11/2025 | 956.7 KB | |||
| Small-sized RISC-V CPU IP Core- Lattice Propel Builder | FPGA-IPUG-02114 | 1.0 | 6/3/2020 | 1.4 MB | |||
