LatticeSC/M

High-Performance FPGAs today, for tomorrow’s communication network needs

The family has been discontinued. The collateral below is for reference and legacy support only. For more information please see the related Product Change Notifications:

Because performance matters – Offering best-in-class solutions for standards like Ethernet, PCI Express, SPI4.2 and high speed memory controllers, LatticeSC/M is equipped with embedded memory, hierarchical clocking and clock management resources for high-end system designs.

For when fast isn’t fast enough – Integrated SERDES with embedded advanced PCS, PURESPEED technology to support 2 Gbps parallel IOs, and embedded ASIC blocks provide the highest performing FPGA imaginable.

Lower power – With a 1 V Vcc option that reduces fabric power consumption by 44% and SERDES channels that use just 105mW per channel, power consumption is kept to a minimum.

Features

  • 15 k to 115 k LUT4s
  • 139 to 942 IOs
  • 700 MHz global clock, 1 GHz edge clocks
  • 4 to 32 SERDES blocks per device at 600 Mbps to 3.8 Gbps
  • 1 to 7.8 Mbits Embedded Block RAM at 500 MHz
  • Eight PLLs per device running at up to 1GHz and 12 DLLs per device running at up to 700 MHz

Jump to

Family Table

LatticeSC/M Device Selection Guide

Parameters LFSC40 LFSC80 LFSC115
Logic Resources – LUTs (K) 40.4 80.1 115.2
sysMEM EBR RAM Blocks (18Kb / Block) 216 308 424
Embedded Memory (Mbits) 3.98 5.68 7.80
Max. Distributed Memory (Mbits) 0.65 1.28 1.84
Max. # of SERDES Channels (3.8Gbps) 16 32 32
DLLs 12 12 12
PLLs 8 8 8
MACO Blocks (LatticeSCM only) 10 10 12
Packages (I/O + Dedicated Inputs)
  LFSC40 LFSC80 LFSC115
256-ball fpBGA (17 x 17 mm)      
900-ball fpBGA (31 x 31 mm)      
1020-ball fcBGA (33 x 33 mm) 562 / 16    
1152-ball fcBGA (35 x 35 mm) 604 / 16 660 / 16 660 / 16
1704-ball fcBGA (42.5 x 42.5 mm)   904 / 32 942 / 32

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Development Kits & Boards

Our development boards & kits help streamline your design process

Complete Design Flows, High Ease of Use

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Electrical Recommendations for Lattice SERDES
FPGA-TN-020773.312/16/2025PDF1.2 MB
High-Speed PCB Design Considerations
FPGA-TN-021786.48/21/2024PDF3.5 MB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
FPGA-SC-020059.012/16/2025ZIP3.2 MB
LatticeSC FPGAs: Implementing 3.3V Interfaces in 2.5V VCCIO Banks
TN111001.011/1/2006PDF95.9 KB
LatticeSC High-Speed Backplane Measurements
TN111801.06/1/2006PDF153.3 KB
LatticeSC MACO Core LSCDR1X18 Low-Speed Clock and Data Recovery User's Guide
TN112201.11/10/2008PDF394.5 KB
LatticeSC MPI/System Bus
TN108501.54/28/2010PDF2.5 MB
LatticeSC PURESPEED I/O Adaptive Input Logic User's Guide
TN115801.36/15/2010PDF492.1 KB
LatticeSC PURESPEED I/O Usage Guide
TN108802.64/2/2013PDF5.8 MB
LatticeSC QDRII/II+ SRAM Memory Interface User's Guide
TN109601.111/19/2007PDF450.2 KB
LatticeSC SERDES Jitter
TN108401.23/4/2008PDF422.4 KB
LatticeSC sysCLOCK PLL/DLL User's Guide
TN109802.17/30/2012PDF3.4 MB
LatticeSC sysCONFIG Usage Guide
TN108002.010/27/2008PDF628.3 KB
LatticeSC/M 2.5GbE Physical/MAC Layer Interoperability Over CX4
TN116401.010/1/2007PDF2.6 MB
LatticeSC/M Broadcom 1-Gigabit Ethernet Physical Layer Interoperability Over CX-4
TN115701.08/1/2007PDF1.2 MB
LatticeSC/M Broadcom 2.5 GbE Physical Layer Interoperability Over CX-4
TN115601.08/16/2007PDF1.4 MB
LatticeSC/M Broadcom HiGig+ 12 Gbps Physical Layer Interoperability Over CX-4
TN115401.08/16/2007PDF1.2 MB
LatticeSC/M Broadcom XAUI/HiGig" 10 Gbps Physical Layer Interoperability Over CX-4
TN115501.08/16/2007PDF1.3 MB
LatticeSC/M DDR/DDR2 SDRAM Memory Interface User's Guide
TN109901.47/18/2008PDF567.6 KB
LatticeSC/M Family Data Sheet
DS100402.412/19/2011PDF2.6 MB
LatticeSC/M Family flexiPCS Data Sheet
DS100502.06/17/2011PDF3.6 MB
LatticeSC/M Hardware Checklist
TN116701.16/10/2008PDF52.4 KB
LatticeSC/Marvell Gigabit Ethernet Physical Layer Interoperability
TN112001.110/1/2006PDF1.2 MB
LatticeSC/Marvell Serial-GMII (SGMII) Physical Layer Interoperability
TN112701.011/1/2006PDF1.6 MB
LatticeSC/Marvell XAUI Interoperability
TN112801.011/1/2006PDF1.4 MB
LatticeSCM SPI4.2 Interoperability with PMC-Sierra PM3388 Technical Note
TN112101.08/1/2006PDF3.3 MB
On-Chip Memory Usage Guide for LatticeSC Devices
TN109401.811/7/2008PDF1.2 MB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN80771.33/1/2015PDF2.4 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN80771.31/4/2013RAR1.4 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
PCI Express SIG Compliance Overview for Lattice Semiconductor FPGAs
TN116601.08/1/2007PDF759.5 KB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-021151.11/26/2022PDF708.9 KB
Power Estimation and Management for LatticeSC Devices
TN110101.37/1/2007PDF1.2 MB
Scalable Low-Voltage Signaling with LatticeSC/M Devices
AN808501.07/14/2011PDF1.1 MB
SPI Serial Flash Programming Using ispJTAG in LatticeSC Devices
TN110001.11/14/2008PDF578.2 KB
SPI4.2 Interoperability with ORSPI4 in LatticeSC Devices
TN111601.06/1/2006PDF1.4 MB
Temperature Sensing Diode in LatticeSC Devices
TN111501.312/8/2010PDF111.5 KB
Thermal Management
FPGA-TN-020445.812/11/2025PDF1.1 MB
Transmission of High-Speed Serial Signals over Common Cable Media
FPGA-TN-021961.98/6/2023PDF1.8 MB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-023121.16/23/2022PDF236.5 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

TITLENUMBERVERSIONDATEFORMATSIZE
Select All
LatticeSC/M Family Data Sheet
DS100402.412/19/2011PDF2.6 MB
LatticeSC/M Family flexiPCS Data Sheet
DS100502.06/17/2011PDF3.6 MB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Clock Boosting in LatticeSC/M FPGAs
TN113102.04/1/2007PDF112.2 KB
Electrical Recommendations for Lattice SERDES
FPGA-TN-020773.312/16/2025PDF1.2 MB
Electrical Recommendations for Lattice SERDES (Chinese Language Version)
TN1114C02.810/12/2012PDF2 MB
High-Speed PCB Design Considerations
FPGA-TN-021786.48/21/2024PDF3.5 MB
High-Speed PCB Design Considerations (Chinese Language Version)
TN1033C06.15/23/2011PDF434.6 KB
LatticeSC flexiPCS/SERDES Design Guide
TN114501.510/27/2008PDF835.6 KB
LatticeSC FPGAs: Implementing 3.3V Interfaces in 2.5V VCCIO Banks
TN111001.011/1/2006PDF95.9 KB
LatticeSC High-Speed Backplane Measurements
TN111801.06/1/2006PDF153.3 KB
LatticeSC MACO Core LSCDR1X18 Low-Speed Clock and Data Recovery User's Guide
TN112201.11/10/2008PDF394.5 KB
LatticeSC MPI/System Bus
TN108501.54/28/2010PDF2.5 MB
LatticeSC PURESPEED I/O Adaptive Input Logic User's Guide
TN115801.36/15/2010PDF492.1 KB
LatticeSC PURESPEED I/O Usage Guide
TN108802.64/2/2013PDF5.8 MB
LatticeSC QDRII/II+ SRAM Memory Interface User's Guide
TN109601.111/19/2007PDF450.2 KB
LatticeSC SERDES Jitter
TN108401.23/4/2008PDF422.4 KB
LatticeSC sysCLOCK PLL/DLL User's Guide
TN109802.17/30/2012PDF3.4 MB
LatticeSC sysCONFIG Usage Guide
TN108002.010/27/2008PDF628.3 KB
LatticeSC/M 2.5GbE Physical/MAC Layer Interoperability Over CX4
TN116401.010/1/2007PDF2.6 MB
LatticeSC/M Broadcom 1-Gigabit Ethernet Physical Layer Interoperability Over CX-4
TN115701.08/1/2007PDF1.2 MB
LatticeSC/M Broadcom 2.5 GbE Physical Layer Interoperability Over CX-4
TN115601.08/16/2007PDF1.4 MB
LatticeSC/M Broadcom HiGig+ 12 Gbps Physical Layer Interoperability Over CX-4
TN115401.08/16/2007PDF1.2 MB
LatticeSC/M Broadcom XAUI/HiGig" 10 Gbps Physical Layer Interoperability Over CX-4
TN115501.08/16/2007PDF1.3 MB
LatticeSC/M DDR/DDR2 SDRAM Memory Interface User's Guide
TN109901.47/18/2008PDF567.6 KB
LatticeSC/M Hardware Checklist
TN116701.16/10/2008PDF52.4 KB
LatticeSC/Marvell Gigabit Ethernet Physical Layer Interoperability
TN112001.110/1/2006PDF1.2 MB
LatticeSC/Marvell Serial-GMII (SGMII) Physical Layer Interoperability
TN112701.011/1/2006PDF1.6 MB
LatticeSC/Marvell XAUI Interoperability
TN112801.011/1/2006PDF1.4 MB
LatticeSCM SPI4.2 Interoperability with PMC-Sierra PM3388 Technical Note
TN112101.08/1/2006PDF3.3 MB
On-Chip Memory Usage Guide for LatticeSC Devices
TN109401.811/7/2008PDF1.2 MB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN80771.33/1/2015PDF2.4 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN80771.31/4/2013RAR1.4 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
PCI Express SIG Compliance Overview for Lattice Semiconductor FPGAs
TN116601.08/1/2007PDF759.5 KB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-021151.11/26/2022PDF708.9 KB
Power Estimation and Management for LatticeSC Devices
TN110101.37/1/2007PDF1.2 MB
Scalable Low-Voltage Signaling with LatticeSC/M Devices
AN808501.07/14/2011PDF1.1 MB
SPI Serial Flash Programming Using ispJTAG in LatticeSC Devices
TN110001.11/14/2008PDF578.2 KB
SPI4.2 Interoperability with ORSPI4 in LatticeSC Devices
TN111601.06/1/2006PDF1.4 MB
Temperature Sensing Diode in LatticeSC Devices
TN111501.312/8/2010PDF111.5 KB
Thermal Management
FPGA-TN-020445.812/11/2025PDF1.1 MB
Transmission of High-Speed Serial Signals over Common Cable Media
FPGA-TN-021961.98/6/2023PDF1.8 MB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-023121.16/23/2022PDF236.5 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
ACN03D-11 Withdrawal of ACN03C-11
Material Set
ANC03D-1114/1/2011PDF796.6 KB
PCN 03A-12 Revision to Lattice SC,SCM Datasheets
Data Sheet
PCN03A-121.02/27/2012PDF95.6 KB
PCN#08A-17 Notification of Intent to Discontinue Select Devices
PCN08A-171.011/1/2017PDF275.7 KB
PCN01A-10 Notification of Ceramig fcBGA to Organic fcBGA Conversion and Discontinuance of Ceramic fcBGA for LatticeSC/SCM Families
PCN01A-1012/1/2010PDF763.5 KB
PCN01A-10 Notification of Ceramig fcBGA to Organic fcBGA Conversion and Discontinuance of Ceramic fcBGA for LatticeSC/SCM Families - Japanese Language 1
PCN01A-1012/1/2010PDF856.5 KB
PCN02A-10 Notification of 1020-ball Organic fcBGA to Organic fcBGA Revision 2 Conersion and Discontinuance of Organic fcBGA for LatticeSC/SCM
PCN02A-1012/1/2010PDF423.9 KB
PCN02A-10 Notification of 1020-ball Organic fcBGA to Organic fcBGA Revision 2 Conersion and Discontinuance of Organic fcBGA for LatticeSC/SCM - Japanese Language 1
PCN02A-1012/1/2010PDF517.4 KB
PCN05A-17 Affected Parts List
1.010/18/2017XLSX14.9 KB
PCN05A-17 Halogen-Free substrate at ASEM
1.210/27/2017PDF268 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set
PCN07C-111.08/1/2011PDF917.9 KB
PCN08A-11 Revision to LatticeSC/SCM flexiPCS Datasheet
Data Sheet
PCN08A-111.06/20/2011PDF207.5 KB
PCN11A-11 Notification of Intent to Discontinue Select Devices
Discontinuance
PCN11A-111.08/1/2011PDF198.4 KB
PCN14A-10 Notification of Coplanarity and height specification changes for the 1152-ball and 1704-ball organic flip chip BGA for the LatticeSC/SCM families of FPGAs
PCN14A-1019/7/2010PDF339.7 KB
PCN14A-10 Notification of Coplanarity and height specification changes for the 1152-ball and 1704-ball organic flip chip BGA for the LatticeSC/SCM families of FPGAs - Japanese Lanauage
PCN14A-1019/7/2010PDF462.4 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
FPGA-SC-020059.012/16/2025ZIP3.2 MB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Lattice FPGA Product Selector Guide
v25.3.01/6/2026PDF717 KB
Lattice HetNet Solutions Brochure
I02341.011/12/2013PDF2.2 MB
LatticeSC FPGA Family Product Brief
I01817.012/11/2012PDF4.4 MB
Wireless Solutions Brochure
I01973.08/14/2012PDF2 MB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
FN256_FAN_M4A
Rev H6/8/2022PDF24.5 KB
FN900_SC
Rev D14/12/2018PDF22.5 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Delivering FPGA-Based Pre-engineered IP Using Structured ASIC Technology
2/1/2006PDF452.1 KB
Designing 2GB/S Parallel I/O with the LatticeSC FPGA
4/3 unexpired
2/1/2006PDF802 KB
Developing High-Speed Memory Interfaces: The LatticeSCM FPGA Advantage
2/1/2006PDF132.1 KB
flexiMAC: A Microsequencer for Flexible Protocol Processing
2/1/2006PDF465.2 KB
Leading FPGA Architectures are Meeting the Connectivity Challenge
1/1/2006PDF305.3 KB
Managing Power Sequencing for the LatticeSC FPGA
2/1/2007PDF312.9 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
[BSDL] LFSC3GA115E FCBGA1152
1.001/2/2008BSM172 KB
[BSDL] LFSC3GA15E FPBGA256
1.001/2/2008BSM56.8 KB
[BSDL] LFSC3GA15E FPBGA900
1.001/2/2008BSM86.9 KB
[BSDL] LFSC3GA25E FFBGA1020
1.001/2/2008BSM110.4 KB
[BSDL] LFSC3GA25E FPBGA900
1.001/2/2008BSM99 KB
[BSDL] LFSC3GA40E FCBGA1152
1.001/2/2008BSM134.9 KB
[BSDL] LFSC3GA40E FFBGA1020
1.001/2/2008BSM128.9 KB
[BSDL] LFSC3GA80E FCBGA1152
1.001/2/2008BSM154.9 KB
[BSDL] LFSC3GA80E FCBGA1704
1.001/2/2008BSM191 KB
[BSDL] LFSCM3GA115EP1 FCBGA1152
1.001/2/2008BSM171.9 KB
[BSDL] LFSCM3GA15EP1 FPBGA256
1.001/2/2008BSM56.9 KB
[BSDL] LFSCM3GA15EP1 FPBGA900
1.001/2/2008BSM86.9 KB
[BSDL] LFSCM3GA25EP1 FFBGA1020
1.001/2/2008BSM110.5 KB
[BSDL] LFSCM3GA25EP1 FPBGA900
1.001/2/2008BSM99 KB
[BSDL] LFSCM3GA40EP1 FCBGA1152
1.001/2/2008BSM135 KB
[BSDL] LFSCM3GA40EP1 FFBGA1020
1.001/2/2008BSM128.4 KB
[BSDL] LFSCM3GA80EP1 FCBGA1152
1.001/2/2008BSM155 KB
[BSDL] LFSCM3GA80EP1 FCBGA1704
1.001/2/2008BSM191 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
SC SCM Device Family DELPHI Models
1.08/20/2009ZIP348.4 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
[IBIS] LatticeSC IBIS Model
2.02/11/2009IBS76.6 MB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Lattice MPI/System Bus HDL Source Files
9/18/2006ZIP324.1 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Lattice PCIexpress Demo
This will install a console application and a Java application (along with Windows device drivers) that allow you to access a Lattice PCIe Eval Board. The demo software provides access to the 16 Segment LED, DIP switches, scratch pad register and EBR
01.53/4/2008ZIP22.5 MB
LatticeSC Driver Package
This .zip file contains software drivers, documentation, and examples to help use various built-in features of the LatticeSC FPGA.
2/8/2006ZIP1 MB
LatticeSCM15 PCIe x1 Hard LTSSM Demo
3.15/22/2013ZIP11 MB
LatticeSCM25 PCIe x1 Soft LTSSM Demo
3.15/22/2013ZIP11.2 MB
LatticeSCM80 PCIe x4 Hard LTSSM Demo
3.15/22/2013ZIP11.1 MB
LatticeSCM80 PCIe x4 Soft LTSSM Demo
3.15/22/2013ZIP11.3 MB
PCIe SG-DMA Demo Package for Windows,
Updated version of the PCI Express Scatter Gather DMA demo that now contains ECP2M50 support.
1.0.11/17/2008EXE1.6 MB

Support

Technical Support

Need Help? We're Here to Assist You

Quality & Reliability

Reference Material to Help Answer Your Questions